AMD Kria’s Jetson Thor Benchmark Is a Proxy Test | Magica
AMD’s Kria Pitch Leans on a Proxy Benchmark Against Jetson Thor
Editorial Team
••📖6 min read
AMD’s Kria AI system-on-module and robotics developer platform combine an X100 processor, FPGA-equipped carrier board and open software stack. But the headline 3.4x real-time result comes from an AMD-commissioned simulation run on a Strix Halo mini PC configured as an X100 proxy—not on the forthcoming Kria hardware—and its public descriptions contain methodological differences that make independent reproduction the next test.
AMD’s Kria launch packages embedded compute, an FPGA carrier and robotics software into a proposed route from prototype to production.
Its 3.4x figure is a control-deadline result from a 15-minute simulated workload on an X100 proxy, not a measurement of a Kria module or of robot reaction speed.
The benchmark is public and extensible, but conflicting published workload details and unannounced platform pricing leave its commercial case unfinished.
Advanced Micro Devices, the semiconductor maker whose adaptive SoCs and FPGAs have long been used for robot sensing, safety and control, is now trying to supply the robot’s main computer as well. Its Kria AI Solutions announcement introduces system-on-modules (SOMs) based on the Ryzen AI Embedded X100 processor family, plus a robotics developer platform. The company’s stake is to turn that existing embedded footprint into a production platform for robots that must combine sensing, AI inference, planning and real-time control.
The headline performance claim needs a narrower reading. AMD says Kria can deliver up to 3.4 times better real-time results than Nvidia Jetson Thor. The cited test did find fewer missed control-loop deadlines, but it tested a GMKtec EVO-X2 mini PC with a Ryzen AI Max+ 395 configured to reflect the expected X199 specification. It did not test a production Kria SOM or the forthcoming developer platform.
AMD’s Kria AI Solutions product graphic pairs the Kria AI system-on-module with the robotics developer platform. Source: AMD.
The new product is a platform proposal, not a benchmarked production system
Kria is an open-standard COM-HPC module combining up to 16 Zen 5 CPU cores, an RDNA 3.5 integrated GPU, an XDNA 2 NPU and up to 128 GB of unified LPDDR5X memory, according to AMD’s product page. The developer platform places that SOM on a carrier with a Spartan UltraScale+ FPGA and robot-oriented camera, networking and industrial interfaces. AMD says its ROCm-based software suite supports ROS 2, MoveIt, PyTorch and ONNX; technical coverage says Xen virtualization is intended to isolate hard-real-time and general-purpose work on the same board.
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Editorial Team
That architecture is distinct from the test system. The benchmark calls the AMD machine “Strix Halo (X100),” an x86 alternative to Nvidia’s embedded Jetson line. The future Kria SOM is meant to turn the X100-class silicon into a modular embedded product, while the carrier supplies the FPGA and I/O that the mini-PC test configuration did not represent. The result can therefore support an argument about the underlying compute configuration, not a completed end-to-end validation of Kria hardware.
The launch schedule reinforces the distinction. X100 processors began sampling in June, while Kria SOMs from original-design-manufacturer partners and general availability of the developer platform are expected in the fourth quarter of 2026, as a product report notes. The developer platform’s price has not been announced.
Average control-loop scheduling misses per second in Open Navigation’s company-reported, AMD-commissioned benchmark. Source: Open Navigation.
What the comparison actually measured
Open Navigation, which says it collaborated with AMD but executed the work independently, ran a continuous autonomous-forklift simulation with sensor-driver load, Nav2 navigation and Gemma 4.0 31B vision-language-model inference. The simulated warehouse ran on a separate computer; the tested platform carried the onboard workload. That design deliberately excludes simulation load, but it also means the result is a platform-in-the-loop simulation rather than a field deployment.
In the published analysis, the Strix Halo proxy ran at 120 W and Jetson Thor at 130 W. Both completed all missions during a 15-minute run. Control-loop scheduling misses averaged 0.45 per second for the AMD system and 1.6 for Thor—about 3.4 times fewer misses for the AMD configuration. The authors attributed Thor’s misses during peak trajectory planning to ARM CPU cores failing to meet that schedule; they described GPU and memory capability as effectively tied for this workload.
That is decision-relevant for an integrator choosing a single high-power x86 computer or a Jetson for a similarly heavy mix of navigation and model inference. It is not a general test of robot response time, power efficiency, safety, or performance across sensor suites and models. The same analysis says Thor still had enough CPU headroom for modest added workloads and that its Isaac SDK offered accelerated software AMD did not match at the time.
The raw comparison also resists a simple VLM winner. AMD completed 34 of 47 requested queries and Thor 25 of 35; the authors described the AMD configuration as 26% ahead on that workload but within 5% after normalizing for power. The different request counts mean those totals should not be treated as a like-for-like throughput score by themselves.
Open Navigation’s benchmark diagram separates simulation from the computer platform under test. Source: Open Navigation.
A reproducible benchmark still needs a settled specification
The benchmark’s strongest feature is that its repository publishes Docker-based workloads, logs and instructions for adding hardware. That gives robot makers a way to test their own configurations rather than accept the vendor-sponsored result as definitive.
But the public descriptions are not fully aligned. Open Navigation’s article calls the facility 180,000 square feet and says the forklift returns to its dock every 100 missions. The repository describes a 200,000-square-foot facility and a return every 200 missions. Both describe the same broad sensor-rich forklift workload, but those differences should be reconciled before the benchmark is treated as a fixed reference configuration.
AMD’s broader sales argument is also software and distribution, not merely CPU margin. Its internal CUDA-to-HIP exercise preserved an average 75% of source code across 15 sample applications and 1,199 lines of code; that is a conversion test on a proxy processor, not evidence that a production robotics stack will port with the same ease. The company has also formed a four-tier Robotics Partner Network, with no membership or licensing fees, bringing integrators, ODMs, software vendors, sensor companies and simulation providers around its hardware and open standards foundation, as the program description reports.
What would resolve the commercial question
The next evidence should be less flattering but more useful: independently reproduced runs using shipping Kria SOMs and their FPGA carrier, disclosed platform pricing, and results across different robots, sensor loads, model sizes and lower-power configurations. AMD has shown a credible CPU-headroom advantage for one proxy configuration under one demanding simulated workload. Whether the full Kria platform can translate that into lower system cost, simpler integration and repeatable deployed performance remains the decision robot builders still have to make.
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