Editorial Team
5 min read
Google is reportedly designing Frozen v2, a Gemini-specific inference chip that could hardwire part of a model architecture while retaining updateable weights. The unconfirmed project’s six-to-10-times tokens-per-watt estimate is not comparable to Google’s published TPU claims, leaving its practical advantage unproved.
Google is reportedly considering a server chip tailored to Gemini, an approach that would make the model’s underlying design part of the hardware. The project, informally called Frozen v2, is reported to be a new line alongside—not a replacement for—Google’s tensor processing units.
The consequential point is not that Google is entering custom silicon; it already has. It is that Frozen v2 would reportedly commit a future chip to parts of one model architecture. The available reporting does not show whether that commitment will make a production service cheaper or faster than Google’s existing TPU stack.
People familiar with the work told the report that engineers are still settling the design and the amount of model information to hardwire. Deployment is planned as soon as 2028, according to the account, which traces the claims to reporting by The Information.
Google did not confirm Frozen v2. In a statement published in a separate account, the company said its teams research hardware-and-software co-design and cautioned that not every project reaches production. That is evidence of a general research program, not confirmation of the reported architecture or timetable.
The report, relaying The Information’s account, says the project is meant to help with an AI-computing capacity squeeze that has created internal tension and led Google Cloud to decline some outside-customer deals. That account identifies a possible reason to pursue efficiency, but it does not establish how much capacity Frozen v2 would add, who would receive it, or whether it would change cloud pricing.
Google Cloud’s official product image of an Ironwood TPU. Source: Google Cloud Blog.
The reported projection is six to 10 times as many AI tokens served per unit of power as Google’s latest homegrown AI chips. It is a forecast by project workers, with no disclosed model version, workload, latency target, chip configuration, measurement method or deployment cost. It therefore cannot support a claim of six-to-10-times cheaper service.
Google’s own published TPU figures illustrate the mismatch. In a November 2025 product announcement, it said its seventh-generation Ironwood TPU offered 10 times peak performance over TPU v5p and more than four times per-chip performance for training and inference over TPU v6e, or Trillium. Those are Google performance claims against named prior generations, not tokens-per-watt figures for Frozen v2; they cannot be converted into a head-to-head result.
The existing TPU system is also not a generic baseline with no inference work behind it. Google describes Ironwood as serving high-volume, low-latency inference as well as training and reinforcement learning. It says its GKE Inference Gateway can reduce time-to-first-token latency by up to 96% and serving costs by up to 30% through load balancing across TPU servers. Those are separate company claims, with no stated equivalence to Frozen v2’s estimate, but they show the relevant alternative is an evolving hardware-and-software stack rather than an idle legacy chip.
The reported design would not put one fixed Gemini release on a chip. It would encode parts of the neural-network architecture while permitting new weights to be loaded. An earlier concept reportedly led by Google DeepMind Chief Scientist Jeff Dean would have embedded the weights themselves and was abandoned because it would have tied the chip to a single model version, the account says.
That distinction limits the usual “frozen model” description, but it does not resolve the durability question. Google’s own Ironwood announcement says that model architectures are constantly shifting. Separately, a Bloomberg report cited in the reporting said Google delayed its latest Gemini model after it fell short of internal goals. Neither account says Frozen v2’s fixed elements will become obsolete; together, they show why a 2028 hardware choice cannot be treated as a settled model-roadmap decision.
The concept also is not a new category of chip. Taalas has demonstrated a chip with an 8-billion-parameter Llama model, including its architecture and weights, embedded in silicon, according to one account. The same reporting describes d-Matrix and SambaNova as pursuing other inference-oriented designs. Their products and claims are not a like-for-like benchmark for a prospective Gemini chip, but they undercut any suggestion that model-specific hardware begins with Frozen v2.
Other AI companies are pursuing custom chips without evidence here that their technical designs match Google’s reported approach. The reporting says OpenAI announced an inference processor called Jalapeño in June and that Anthropic had been reported to be discussing a chip partnership with Samsung. Those developments establish competitive interest in serving efficiency, not a common price, performance or deployment comparison.
Frozen v2’s next decision is whether to turn a research effort into a product. Before its projected efficiency is meaningful, Google would need to identify what architectural elements are fixed and publish comparable tests that specify the Gemini model, tokens-per-watt denominator, latency, hardware configuration and workload.
It would also need to show how those results change serving cost, capacity and reliability relative to contemporary TPUs. Until then, the strongest supported conclusion is narrower than a claim of a decisive new chip: Google is reportedly testing a more rigid form of co-design while its flexible inference platform continues to advance.
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